Zero drift analog memory cell, array and method of operation
US7002821B2 · kind B2 · utility
2Cited by
6References
37Claims
0Family size
Inventor
Key dates
| Filing date | Apr 12, 2004 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Jul 12, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A zero-drift analog memory (ZDAM) cell that indefinitely maintains an output signal at a discrete voltage while the memory circuit is powered, wherein the memory circuit receives an input signal, passes the input signal to a storage element upon receiving an assertion signal, maintains an output signal at a level of the input signal when the assertion signal is removed, and utilizes a zero-drift transfer function feedback loop on the output signal to maintain the output signal. A memory array including a plurality of ZDAM cells and method of operation are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.