Content addressable memory architecture
US7002824B2 · kind B2 · utility
3Cited by
7References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2004 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Aug 5, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Content Addressable Memory array includes a plurality of coupled sub-blocks arranged in rows and columns. Search data received by a first sub-block in a first column of the CAM is propagated to each sub-block in the row to the last sub-block in the last column of the CAM. The search result for the CAM is selected based on the propagated search results for each row of sub-blocks and output on a side of the array opposite from the side receiving the search data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.