Methods and apparatuses for a ROM memory array having a virtually grounded line
US7002827B1 · kind B1 · utility
25Cited by
19References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2003 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Aug 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses in which a ROM memory array has virtual-grounded source lines programmed in layer physically higher than the diffusion layer. The ROM memory array may include a diffusion layer, one or more virtual-grounded source lines, and one or more bit lines. At least one of the virtual-grounded source lines is programmed with a layer physically higher than the diffusion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.