Semiconductor memory device which selectively controls a local input/output line sense amplifier
US7002858B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 16, 2004 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Jul 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device in which a local input/output line sense amplifier may be selectively enabled or disabled. The semiconductor memory device may include a memory cell array block, a redundancy circuit, a switch unit, and/or a control unit. The memory cell array block may include a local input/output line sense amplifier that operates in response to a sense amplifier enable signal. The redundancy circuit may include a redundancy local input/output line sense amplifier that operates in response to the sense amplifier enable signal. The switch unit may selectively output data output from the local input/output line sense amplifier or the redundancy local input/output line sense amplifier, in response to a first select signal and a second select signal. If the redundancy circuit operates, the control unit may generate, in response to the second select signal, a sense amplifier operation control signal that disables the local input/output line sense amplifier. Since the semiconductor memory device selectively enables or disables the local input/output line sense amplifier, unnecessary current consumption caused due to dummy sensing is avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.