Memory bus interface for use in a peripheral device
US7003638B2 · kind B2 · utility
5Cited by
10References
53Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2002 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Jan 9, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A peripheral device may include an interface configured to interface to a memory bus and a functional unit coupled to the interface and configured to perform a peripheral device function on data accessed by the interface. The interface may be configured to perform a data access in response to memory control, address, and data signals on the memory bus. The functional unit may be configured to perform various peripheral device functions such as data communication functions, video functions, printing functions, mass storage functions, and human interface controller functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.