Method and apparatus for low cost signature testing for analog and RF circuits

US7006939B2 · kind B2 · utility

Assignee

• Georgia Tech Research Corporation · US

Inventors

• Ram Voorakaranam · Smyrna, US
• Abhijit Chatterjee · Marietta, US
• Pramodchandran Variyam · Plano, US
• Sasikumar Cherubal · Tucson, US
• Alfred Gomes · Sunnyvale, US

Key dates

• Filing date: Apr 18, 2001
• Grant date: Feb 28, 2006
• Expiry date: Jun 4, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2837
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A low cost signature test for RF and analog circuits. A model is provided to predict one or more performance parameters characterizing a first electronic circuit produced by a manufacturing process subject to process variation from the output of one or more second electronic circuits produced by the same process in response to a selected test stimulus, and iteratively varying the test stimulus to minimize the error between the predicted performance parameters and corresponding measured values for the performance parameters, for determining an optimized test stimulus. A non-linear model is preferably constructed for relating signature test results employing the optimized test stimulus in manufacturing testing to circuit performance parameters.