Nak throttling for USB host controllers
US7007110B2 · kind B2 · utility
8Cited by
5References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2001 |
| Grant date | Feb 28, 2006 |
| Priority date | — |
| Expiry date | Jun 14, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for traversing a schedule with a bus master, the schedule having a plurality of elements, each element having information pertaining to one of a plurality of endpoints; executing transactions on a bus in accordance with the information pertaining to the plurality of endpoints; counting flow control events issued by individual endpoints; and skipping elements in the traversal of the schedule, the elements being skipped corresponding to endpoints which have issued a threshold number of flow control events.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.