Methods and apparatus for utilizing flash burst mode to improve processor performance
US7007132B2 · kind B2 · utility
3Cited by
4References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2002 |
| Grant date | Feb 28, 2006 |
| Priority date | — |
| Expiry date | Jan 22, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for accessing flash memory in a continued burst mode are provided. The apparatus includes a processor for executing instructions including memory access instructions, the processor generating a next access signal that indicates if a next memory access is in sequence with a current memory access, a memory having a continued burst mode of operation, and a bus interface for controlling access to the memory in response to the memory access instructions. The bus interface unit enables the continued burst mode of the memory while the next access signal is asserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.