Testing self-repairing memory of a device
US7007211B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2002 |
| Grant date | Feb 28, 2006 |
| Priority date | — |
| Expiry date | Jan 6, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Testing one or more memories of a device includes receiving one or more first repair records from one or more built-in self-testers of a device having one or more memories. A built-in self-tester is associated with a memory, and a first repair record describes a first repair at a memory. A first repair signature corresponding to the first repairs at the memories is generated from the first repair records, and then is recorded. One or more second repair records are received from the built-in self-testers, where a second repair record describes a second repair at a memory. A second repair signature corresponding to the second repairs at the memories is generated from the second repair records. The second repair signature is compared with the first repair signature. The device is evaluated in response to the comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.