Methods and apparatus for improving large signal performance for active shunt-peaked circuits
US7009425B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2004 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Jul 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/012
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic circuit employs a shunt peaked technique to enhance the switching speed of the circuit without an increase in power dissipation. A differential logic gate implements a digital circuit function. The shunt peaked logic circuit includes two resistive and two inductive elements. For each differential output line, a resistive element is coupled in series to an inductive element so as to couple the circuit power supply voltage to a differential output line. Under this configuration, the bandwidth of the logic circuit is increased without an increase in power consumption. The logic circuit may be implemented using CML or ECL logic. Techniques for improving large signal performance for active shunt-peaked circuits are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.