Circuit for generating pixel clock with fine phase control
US7009430B2 · kind B2 · utility
7Cited by
8References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2004 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Mar 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for generating a pixel clock for use in scanning a laser beam includes a high-frequency-clock generating circuit which generates a high-frequency clock having a higher frequency than the pixel clock, and a control circuit which generates the pixel clock while shifting a phase of the pixel clock by a shift step proportional to a clock cycle of the high-frequency clock in response to phase data indicative of timing and amounts of phase shifts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.