DC-DC converter circuits and method for reducing DC bus capacitor current
US7009852B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2004 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Sep 17, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus for reducing the heat losses caused by the DC Bus capacitor current is proposed. The apparatus includes: a double frequency boost converter circuit having two boost converter circuits coupled in parallel, in which two switches, respectively disposed on the two boost converter circuits, are turned on and off alternately to produce an output current having a frequency twice that of control signals of the two switches, and to offer a DC bus respectively, a full-bridge DC-DC converter coupled to an output terminal of the double frequency boost converter circuit for transforming an output of the DC bus to a DC voltage, and a DC bus capacitor coupled to the double frequency boost converter circuit and the full-bridge DC-DC converter in parallel for balancing two corresponding transient powers of the double frequency boost converter circuit and the full-bridge DC-DC converter respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.