Power control avoiding outer loop wind-up
US7010321B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2002 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | May 12, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W52/36
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for power control that avoids outer loop wind-up are disclosed. In one aspect, wind-up of a target power level is detected, and the target power level is modified in response. In another aspect, unwinding of the target power level is detected, after which the target power level is determined without considering wind-up. Various other aspects are also presented, including wind-up and unwinding detection procedures, and target power level modification procedures. These aspects have the benefit of reducing the time that transmit power exceeds that which is necessary, thus increasing system capacity and performance, and mitigating misallocation of system resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.