Managing a secure environment using a chipset in isolated execution mode

US7013484B1 · kind B1 · utility

Assignee

• Intel Corporation · US

Inventors

• Carl M. Ellison · Portland, US
• Roger Golliver · Beaverton, US
• Howard C. Herbert · Phoenix, US
• Derrick C. Lin · San Mateo, US
• Francis X. McKeen · Portland, US
• Gilbert Neiger · Hillsboro, US
• Ken Reneris · Wilbraham, US
• James A. Sutton · Portland, US
• Shreekant S. Thakkar · Portland, US
• Millind Mittal · Palo Alto, US

Key dates

• Filing date: Mar 31, 2000
• Grant date: Mar 14, 2006
• Expiry date: Mar 31, 2020

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F12/1491
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A chipset is initialized in a secure environment for an isolated execution mode by an initialization storage. The secure environment has a plurality of executive entities and is associated with an isolated memory area accessible by at least one processor. The at least one processor has a plurality of threads and operates in one of a normal execution mode and the isolated execution mode. The executive entities include a processor executive (PE) handler. PE handler data corresponding to the PE handler are stored in a PE handler storage. The PE handler data include a PE handler image to be loaded into the isolated memory area after the chipset is initialized. The loaded PE handler image corresponds to the PE handler.