Vacuum package fabrication of integrated circuit components
US7015074B2 · kind B2 · utility
1Cited by
12References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2004 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Oct 18, 2024 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C1/00269
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for manufacturing integrated circuit device lids includes creating a lid cavity on the surface of a lid wafer, forming a sealing surface on the lid wafer that surrounds the lid cavity, and forming a trench on the lid wafer between the lid cavity and the sealing surface. The resulting structure uptakes excess sealing surface material and prevents such material from entering the lid cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.