Thin film transistor array panel including storage electrode
US7015548B2 · kind B2 · utility
4Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2003 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Jul 10, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136227
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate; a plurality of storage conductors formed on the substrate, each storage conductor including a plurality of branches; a gate insulating layer formed on the gate line and the storage conductor; a semiconductor layer formed on the gate insulating layer; a data conductor formed on the semiconductor layer; a passivation layer formed on the data conductor; and a pixel electrode formed on the passivation layer, wherein at most one of the branches of each storage conductor has an isolated end.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.