Efficiency improvement of DC-DC converter
US7015678B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 2004 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Jun 22, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Actual switching DC—DC converters have disadvantages in specific operating regions due to different reasons for power losses. Large switching transistors provide favorable efficiency at high output currents, but need high currents to charge/discharge the switching transistor's gate, resulting in poor efficiency at low output currents. Small transistors are more efficient at low currents, but are poor at high currents. The disclosed invention changes the size of the MOSFET switching transistors proportional to the output current, thus combining the efficiency of small transistors at low output currents and of large transistors at high output currents.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.