Current-limiting circuitry
US7015680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2004 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Sep 2, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/908
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.