Patent · US Expired

Apparatus and method for sample-and-hold with boosted holding switch

US7015729B1 · kind B1 · utility

21Cited by

5References

22Claims

0Family size

Assignee

NATIONAL SEMICONDUCTOR CORPORATION · US

Inventors

Maria R. Tursi · Munich, DE
Robert C. Taft · Munich, DE

Key dates

Filing date	Mar 30, 2004
Grant date	Mar 21, 2006
Priority date	—
Expiry date	Mar 30, 2024

Classification

Technology area (CPC G)Physics
CPC primaryG11C27/024
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A pipelined sample-and-hold circuit is provided. The circuit is pipelined such that processing of a held signal can continue into the next sample phase. Also, the pipelined sample-and-hold circuit includes a hold switch. The hold switch includes a boosted switch and dummy circuits. The boosted switch circuit is responsive to a boosted signal. The dummy circuits are arranged for charge injection cancellation responsive to another boosted signal that is a substantially inverse of the boosted signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.