Systems and methods for preventing disruption of one or more system buses
US7016995B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2003 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Apr 11, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system prevents disruption of one or more system buses. The system monitors communication on the one or more system buses during an input mode and an output mode and detects changes between the input mode and the output mode. The system determines whether a predetermined time period has elapsed after a change from the input mode to the output mode and changes from the output mode to the input mode when the predetermined time period has elapsed after a change from the input mode to the output mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.