Method and circuit to accelerate IPSec processing
US7017042B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2001 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Sep 27, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus' for performing IPSec processing on an IP packet being transmitted onto a network and being received from a network are described. The methods and apparatus' further described perform IPSec processing inline which results in a reduced number of transfers over the system bus, reduced utilization of system memory, and a reduced utilization of the system CPU. An IP packet which requires IPSec processing enters an acceleration device. In one embodiment, the acceleration device is coupled to a security policy database (SPD) and security association database (SAD). IPSec processing is performed at the acceleration device without sending the IP Packet to system memory for processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.