Method, system and synchronization circuit for providing hardware component access to a set of data values without restriction
US7017066B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2003 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | May 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides hardware-based synchronization within a device such as a set top box so that sets of data values can be communicated between a set of DCR registers operating at a first frequency and a set of clock register operating at a second frequency. Specifically, to communicate an initial set of data values from the set of DCR registers to the set of clock registers, a control signal is stretched and then synchronized with a clock signal having the second frequency. To communicate a current set of data values from the set of clock registers to the set of DCR registers, the control signal is synchronized with a clock signal having the first frequency. By communicating the current set of data values to the first set of registers, a hardware component (e.g., a CPU) can access the current set of data values without restriction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.