Current inrush limiting circuit
US7019583B2 · kind B2 · utility
19Cited by
14References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2001 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Jan 29, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/908
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inrush circuit for electronic devices is particularly useful for point-of-sale printers. The circuit applies an active feedback-controlled voltage ramp to a bulk capacitor by means of a P-channel field effect transistor that is operated linearly after a controlled delay for contact bounce.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.