System and method for destructive purge of memory device
US7020019B2 · kind B2 · utility
10Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2004 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Aug 6, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/225
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory purge system destructively purges the memory circuits of a memory device. The system includes a power supply for supplying a selectable voltage and current. Switching circuits electrically connect the power supply to the memory circuits of the memory device. A controller selects a voltage and current supplied by the power supply and activates the switching circuit to apply the voltage and current to the memory circuits. The controller determines whether the memory circuits have been destroyed by monitoring current flow into the memory circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.