Measuring and correcting sense amplifier and memory mismatches using NBTI
US7020035B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2003 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Mar 31, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Post-manufacture compensation for a sensing offset can be provided, at least in part, by selectively exposing one of a pair of cross-coupled transistors in a sense amplifier to a bias voltage selected to cause a compensating shift in a characteristic of the exposed transistor. Such exposure may be advantageously provided in situ by causing the sense amplifier to sense values purposefully skewed toward a predominate value selected to cause the compensating shift. In some realizations, purposefully skewed values (e.g., value and value_1) are introduced directly into the sense amplifier. In some realizations, an on-chip test block is employed to identify and characterize sensing mismatch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.