Method and system for verifying the hardware implementation of TCP/IP
US7020716B2 · kind B2 · utility
6Cited by
26References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2001 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Sep 6, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY04S40/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention provides for a method and system for verifying hardware operation of an Application Specific Integrated Circuit (“ASIC”) chip. The ASIC includes microcode logic for enabling Transmission Control Protocol/Internet Protocol (“TCP/IP”) processing. The method is performed in a system that includes a first computing device having a processor and computer code for simulating a computing device that includes the ASIC. Wherein the ASIC is tested against a conventional TCP/IP stack included in a second computing device coupled to the first computing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.