Data communication bus traffic generator arrangement
US7020807B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2001 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | May 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/423
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement including a test-traffic generator, and adapted to communicate test-traffic onto a digital data path having other traffic sources. A first embodiment includes a data-generation circuit, a memory arrangement, state machine circuitry, and a status and feedback circuit. The memory arrangement stores a plurality of programmable commands indicative the type, pattern and behavior-in-time of the test-traffic. The data-generation circuit provides a data stream to the state machine circuitry, where the state machine assembles portions of the data stream into test-traffic having type, pattern and behavior-in-time characteristics selected responsive to the programmable commands. The state machine generates test-traffic on the digital data path. The status and feedback circuit monitors the digital data path for test-traffic, verifies the test-traffic against the data stream, and generates a feedback signal indicative of test-traffic quality or throughput. In another aspect of the present invention, a computer system includes a test-traffic generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.