Manufacturing method of semiconductor device
US7022575B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2004 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Oct 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An LDD structure and a silicide layer are formed without a reduction in thickness of a silicon substrate or a carbon contamination. Forming a spacer on a sidewall of a gate electrode is performed in two process steps, i.e. dry-etching and wet-etching. Also, a silicon nitride film used as a buffer film in injection of high dose of impurities is removed by wet-etching. As a result, the reduction in thickness of the silicon substrate and the carbon contamination can be prevented. In addition, variation in depth of the high and low impurity concentration regions and silicide forming region with locations on the wafer can be suppressed because of high selection ratio available with the wet-etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.