Printed circuit board trace routing method
US7022919B2 · kind B2 · utility
55Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2003 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Jan 24, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09263
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An I/O routing pattern method is disclosed, for use with heterogeneous printed circuit boards (PCBs), such as those embedded with a reinforcement material, for example, a fiberglass weave. Traces are routed on the PCB so as to reduce sensitivity to changes in the dielectric constant (Dk), which are brought about by the strands of reinforcement material contained within the PCB laminate. The method minimizes the local variations, such as the Dk, time of flight, and capacitance variations, that are observed with traditional routing methods on heterogeneous PCBs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.