Clamping circuit with wide input dynamic range for video or other AC coupled signals
US7023497B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2002 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Jun 25, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A clamping circuit disclosed herein has two modes of operation which include both a bottom level and mid-level clamping mode for clamping automatically onto the sync tip of a video signal and customizably clamping onto the front porch, back porch/pedestal or anywhere within the signal. The clamping circuit (400) includes a clamping capacitor (404) that couples to an automatic clamping circuit portion (405) to automatically clamp the synchronization pulse of the video input signal to a first predetermined reference voltage (Vref1) of a first clamping pulse signal during an automatic clamping mode of operation. The automatic clamping portion (405) connects to the customizable clamping circuit portion (411) to clamp any portion of the video input signal to a second predetermined reference voltage (Vref2) of a second clamping pulse signal during a customizable clamping mode of operation. A buffer (416) connects between the customizable clamping circuit portion and the output node of the clamping circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.