Memory module having mirrored placement of DRAM integrated circuits upon a four-layer printed circuit board
US7023719B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2003 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Oct 23, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module is provided as well as a method for forming a memory module. The memory module includes a printed circuit board having opposed first and second outside surfaces. At least one via can extend through the printed circuit board and couples a conductor on one outside surface to a conductor on another outside surface. A semiconductor memory device on one of those outside surfaces can thereby be connected to one end of the via, with another semiconductor memory device on the opposing outside surface connected to the other end of the via. Preferably, the pair of memory devices are placed on a portion of each respective outside surface so that they essentially align in mirrored fashion with each other. Accordingly, any vias which extend from the footprint of one memory device will take the shortest path to the footprint of the other memory device, with the stubs between the footprint and the via being of essentially the same length and relatively short. The printed circuit board preferably has no more than four conductive layers dielectrically spaced from each other. Two layers are reserved for the opposing outer surfaces, and two layers carrying power and ground signals are…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.