Method and apparatus for digital signal processing
US7023991B1 · kind B1 · utility
4Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2000 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Mar 7, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/42228
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general purpose bus. Commands for controlling operations of the blocks and data of a stream are transferred through the bus. When an encryption encoder/decode is disposed in each block, contents transferred through the bus can be protected. When an encryption encoder/decode circuit is disposed in an interface to which an extension plug-in card is attached, contents that are output from the interface can be protected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.