AMPS receiver using a zero-IF architecture
US7024169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2002 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Aug 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/30
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An AMPS receiver system utilizing a ZIF architecture and processing received forward link signals in the digital domain. The AMPS receiver system includes an antenna (105), a direct converter (110), high dynamic A/D converters (120,130), low pass filters (140, 150), a phase shifter (160), a digital VGA (170), a digital FM demodulator (180), an accumulator (185) and a controller (190). The direct converter (110) further includes a low noise amplifier (112), a splitter (113), mixers (114,116) and low pass filters (118,119). The controller (190) adjusts the gains of the low noise amplifier (112) and the digital VGA (170) based on the average power of the signal outputted by the digital VGA (170).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.