Automatic ATAP test bench generator
US7024346B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2000 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | May 17, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3167
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system is provided for automatically generating ATAP test solutions. The system includes ATAP simulation circuitry, a bus, an ATAP test bench file, an output file, and a test program. The ATAP simulation circuitry is switchably coupled to a selected analog cell having an ATAP for applying analog tests. The bus is coupled with the ATAP simulation. The bus is operative to transmit and receive analog test simulation data. The ATAP test bench file is configured to receive the simulation data. The output file is operative to store the simulation data and deliver the simulation data to the ATAP simulation circuitry. The test program is generated by the ATAP simulation circuitry in the output file. The test program is configured to automatically generate ATAP test benches based upon chip-specific information. A method is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.