Method and system for providing self-calibration for adaptively adjusting a power supply voltage in a digital processing system
US7024568B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2002 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Mar 3, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for providing self-calibration for adaptively adjusting a power supply voltage in a digital processing system is provided that includes providing a nominal power supply voltage to the system as a power supply voltage. A regulator clock signal is propagated through a delay line. The delay line comprises a plurality of delay cells and is operable to function based on the nominal power supply voltage. A plurality of pairs of delay cells are sampled until a first and second delay cell are identified based on the first delay cell receiving the regulator clock signal and the second delay cell failing to receive the regulator clock signal at a specified time. A reference voltage is provided to the system as the power supply voltage. The system is operated using the first and second delay cells to determine whether to adjust the power supply voltage for the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.