Stacked multi-component integrated circuit microprocessor
US7026718B1 · kind B1 · utility
3Cited by
17References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 25, 1998 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | Sep 25, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for fabricating-a microprocessor comprising a first chip (12) having an active face (30) including a central processing unit and a second chip (14) having an active face (32) electrically connected to the active face of the first chip (12), wherein the second chip (14) provides added functionality to the central processing unit of the first chip (12) and wherein the electrical connections (16, 18) are through bonding layers (28) that are in contact with the metalization 26 on the first and second chips (12, 14), is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.