Apparatus and method for generating wobble clock
US7026852B2 · kind B2 · utility
1Cited by
4References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 7, 2004 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | Apr 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for generating wobble clock comprises: a comparing circuit and a phase lock loop. The comparing circuit generates a combining signal according to peak values of the wobble signal and compares the output signal with a reference voltage to output a control signal. The phase lock loop drives the wobble clock to be synchronized with the wobble signal if the protection signal corresponds to a first logic level, and stops driving the wobble clock to be synchronized with the wobble signal if the protect signal corresponds to a second logic level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.