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US7028143B2 · kind B2 · utility
10Cited by
15References
46Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2003 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | Mar 29, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for transferring data, between a first device and second device in a core processor including a data cache, comprising the steps of, when said first device supports wide data transfer, and said transfer of data comprises a data write operation from said first device to said second device, writing said data to the second device without writing the data to said data cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.