Processor stalling
US7028165B2 · kind B2 · utility
60Cited by
9References
30Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Dec 6, 2000 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | May 24, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable processor that includes a pipeline with a number of stages. A stall controller is associated with the pipeline, and detects a hazard condition in at least one of those stages. The stall controller produces a set of signals that can control the stages individually, to stall stages of the pipeline in order to avoid a hazard. In an embodiment, a bubble is formed in the pipeline which allows one instruction to complete prior to allowing the pipeline to continue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.