Method and apparatus for ethernet prioritized device clock synchronization
US7028204B2 · kind B2 · utility
22Cited by
103References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2002 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | Feb 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/83
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and system for transferring a plurality of messages in an Ethernet industrial control environment. The messages are tagged with identifiers of varying levels of priority. The system has a serial network bus. Clock synchronization messages generated by a master device are tagged with a higher priority identifier, while other message types are tagged with a lesser priority identifier. Data having the highest priority identifier is placed onto the bus before placing data with a lesser priority identifier onto the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.