Partially filling block interleaver for a communication system
US7028230B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2002 |
| Grant date | Apr 11, 2006 |
| Priority date | — |
| Expiry date | Jan 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/004
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An interleaver (11b) for filling an interleaver matrix (51) used in interleaving a packet of bits for transmission as symbols via a wireless communication channel in a wireless communication system (11 12) including a modulator (11c), the interleaver (11b) having a number of rows (or columns, depending on whether bits are pulled column-wise or row-wise for encoding as symbols by the modulator) that is not divisible by the number of bits in a symbol, but having at least as many bits as in a packet, and so having, unavoidably, more elements than there are bits in a packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.