Via-filling material and process for fabricating semiconductor integrated circuit using the material
US7030007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2003 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Oct 15, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76814
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A via-filling material includes a polymer containing a repeating unit represented by wherein R1 one of hydrogen, fluorine, chlorine, bromine, and methyl group; R2 is one of hydrogen, a C1-3 alkyl group, and a C1-4 alkyl group in which the hydrogen is replaced by at least one of fluorine, chlorine, and bromine; and X is —C(═O)O— or —S(═O)2O—. This via-filling material does not generate deposits around an opening of a via hole during plasma etching and provides a semiconductor integrated circuit with high reliability, even when a trench wider than the via hole is formed by plasma etching around the via hole filled with the via-filling material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.