Semiconductor device
US7030503B2 · kind B2 · utility
1Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2004 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | May 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.