Precision low jitter oscillator circuit
US7031482B2 · kind B2 · utility
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78References
23Claims
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Key dates
| Filing date | Oct 10, 2003 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Oct 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00208
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.