Systems and methods for testing integrated circuits
US7032151B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2002 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Jul 3, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3167
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Systems and methods for digital-based, standards-compatible, testing of analog circuits embedded inside integrated circuits. In this regard, one such system can be broadly described by a test stimulus generator that transmits a binary-level test-stimulus signal into an analog circuit located inside an integrated circuit; a converter that converts an analog output signal from the analog circuit into a digital output signal; a boundary-scan register chain that transmits the digital output signal out of the integrated circuit, and a test equipment that receives the digital output signal using the IEEE 1149.1 boundary-scan standard and analyzes the digital output signal to compute one or more specifications of the analog circuit located inside the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.