Method and architecture for integrated circuit design and manufacture
US7032191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2004 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Feb 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for integrated circuit (IC) design. A structural multi-project wafer (SMPW) comprises a plurality of pre-manufactured and pre-validated functional blocks. The SMPW is pre-fabricated up to a contact layer so that a user can customize and program different blocks of the SMPW to the user's requirements. An SMPW provider maintains an inventory of SMPWs. If one of the SMPWs can meet all of a user's IC design requirements, or can serve an intermediate step in a user's IC design process, such as market/concept validation or IP validation, the SMPW is provided to the user. The user can then proceed directly to production using a streamlined design flow having a very short cycle time of 1–3 months. Otherwise, the user proceeds to production using a normal design flow having a much longer cycle time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.