Method for manufacturing microstructure
US7033515B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 17, 2003 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Oct 1, 2024 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/0174
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method is for manufacturing a microstructure having a thin-walled portion with use of a material substrate. The material substrate has a laminated structure which includes a first conductor layer 101, a second conductor layer 102, a third conductor layer 103, a first insulating layer 104 interposed between the first conductor layer and the second conductor layer, and a second insulating layer 105 interposed between the second conductor layer and the third conductor layer. The first insulating layer is patterned to have a first masking part for covering a thin-wall forming region of the second conductor layer. The second insulating layer is patterned to have a second masking part for covering the thin-wall forming region of the second conductor layer. The method includes forming the thin-walled portion in the second conductor portion by etching the material substrate from the first conductor layer down to the second insulating layer via a mask pattern 58 including a non-masking region corresponding to the thin-wall forming region of the second conductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.