Pulsed thermal monitor
US7034556B1 · kind B1 · utility
2Cited by
5References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 5, 2003 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Mar 31, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05B1/0233
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power solid-state device is pulsed from a controlled pulse source, which generates heat in the chip. Similar or identical pulses are applied to a software or equivalent electrical hardware temperature simulator, for predicting the chip temperature. The output of the simulator is monitored, and the controlled pulse source is inhibited in the event that the predicted chip temperature exceeds a limit. A delay may be introduced between the pulse generation and application to the chip. Additional temperatures associated with the chip heat sink may be combined with the chip temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.