Low-voltage differential signal (LVDS) transmitter with high signal integrity
US7034574B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 17, 2004 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Oct 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A differential signal output driver circuit having four switching transistors and having a bias transistor that shields each of the switching transistors from the corresponding output terminal thereby blocking the Miller capacitance of the switching capacitor from generating overshoot or undershoot in the output differential voltage. Also, the output driver circuit may be driven by a differential skew cancellation circuit that generates a balanced differential signal to drive the switching transistors to further improve signal integrity. The signal path for generating each signal in the differential signal goes through a similar structure thereby ensuring similar slew in each differential signal provided to the output driver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.