Method and apparatus for flicker filtering interlaced display data
US7034887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2002 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | May 4, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S348/91
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A graphics controller for flicker filtering interlaced image data is provided. The graphics controller includes a buffer and a memory region. A flicker filter for reducing a flicker of a display presented through an interlaced scan is also provided. The flicker filter is configured to receive interlaced image data prior to any received image data being stored in the memory region. The flicker filter outputs filtered data defining a pixel. The filtered data is stored in the memory region such that two pixels can be output in one memory access to the memory region. Flicker filter enabling circuitry in communication with the buffer is provided. The flicker filter enabling circuitry is configured to supply an even segment and a corresponding odd segment of the interlaced image data to the flicker filter. An apparatus and methods for processing and storing image data having an interlaced format are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.